Decoding structure for a memory device with a control code
US6958949B2 · kind B2 · utility
10Cited by
3References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2002 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Dec 17, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A decoding structure for a memory device with a control code is used in a memory including a matrix of memory cells grouped into pages to each of which a block of control information is associated, and a plurality of reading elements for reading a plurality of pages in parallel. The decoding structure selectively connects each reading element to a plurality of memory cells, and selectively connects each memory cell to a plurality of reading elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.