Extended dynamic range watchdog timer
US6959404B2 · kind B2 · utility
9Cited by
6References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2002 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Apr 13, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0757
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor timer comprising a writeable control register, a look-up table and a loadable counter. The loadable counter operates in a first mode to load the count data field and operates in a second mode an entry from said look-up table specified by the count data field. The loadable counter generating a time out signal upon counting a number of clock pulses equal to said count. The writeable control register preferably includes a mode bit selecting the first or second modes. This invention is suitable for a pre-scalar counter as part of a data processor watchdog timer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.