Method for manufacturing a semiconductor device having an improved disposable spacer
US6960512B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2003 |
| Grant date | Nov 1, 2005 |
| Priority date | — |
| Expiry date | Aug 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
The present invention provides methods for manufacturing semiconductor devices. In one embodiment, the method includes forming a gate oxide over a substrate and a gate electrode over the gate oxide. The method also includes implanting impurities into the substrate using the gate electrode as an implant mask to form lightly-doped regions in the substrate. The method further includes forming a first spacer adjacent the gate electrode, and implanting impurities into the substrate and through a portion of the lightly-doped regions using the first spacer as an implant mask to form deep source/drain regions in the substrate. The method still further includes forming a second spacer adjacent the first spacer, implanting impurities into the substrate using the second spacer as an implant mask to form a graded source/drain region in the substrate, and removing the second spacer. Also disclosed is a semiconductor device constructed using the techniques disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.