Programmable image transform processor
US6961084B1 · kind B1 · utility
15Cited by
18References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2000 |
| Grant date | Nov 1, 2005 |
| Priority date | — |
| Expiry date | Mar 29, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/8042
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A programmable image transform system has a programmable addressing and arithmetic blocks. In the programmable addressing block, an input address generator has an input addressing microsequencer and an input addressing memory that stores an input addressing procedure. The microsequencer executes the input addressing procedure to generate addresses from which to request image data. In the programmable arithmetic block, an arithmetic block memory stores an image processing procedure and a microsequencer executes the image processing procedure using the image data to generate transformed image data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.