Method and apparatus for address translation pre-fetch
US6961837B2 · kind B2 · utility
4Cited by
6References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2003 |
| Grant date | Nov 1, 2005 |
| Priority date | — |
| Expiry date | Jan 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/655
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An end of a queue or a page-crossing within a queue is detected. A virtual memory address for the head of the queue or for the next queue page is pre-translated into a physical memory address while the last entry in the queue or in the current queue page is being serviced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.