Electronic device packaging
US6963125B2 · kind B2 · utility
12Cited by
75References
10Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 13, 2002 |
| Grant date | Nov 8, 2005 |
| Priority date | — |
| Expiry date | May 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hermetically coated device includes an integrated semiconductor circuit die, a first layer comprising an inorganic material, the first layer enveloping the integrated semiconductor circuit die, a second layer, the second layer enveloping the integrated semiconductor circuit die. Formation of such device includes steps of providing an integrated semiconductor circuit die, applying a first layer comprising an inorganic material, the first layer enveloping the integrated semiconductor circuit die, and applying a second layer, the second layer enveloping the integrated semiconductor circuit die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.