Shift register circuit including first shift register having plurality of stages connected in cascade and second shift register having more stages
US6963327B2 · kind B2 · utility
15Cited by
7References
41Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2001 |
| Grant date | Nov 8, 2005 |
| Priority date | — |
| Expiry date | Sep 21, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register circuit includes a first shift register having a plurality of stages connected in cascade, and a second shift register having more stages than the first shift register. The stages of the second shift register are divided into groups each formed of consecutive stages. The stages of the first shift register output pulse sequences having a predetermined number of consecutive pulses and having different phases from each other, to the stages constituting the groups of the second shift register as clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.