Floating-gate semiconductor structures

US6965142B2 · kind B2 · utility

Assignee

• Impinj, Inc. · US

Inventors

• Christopher J. Diorio · Shoreline, US
• Todd E. Humes · Shoreline, US

Key dates

• Filing date: Jul 9, 2002
• Grant date: Nov 15, 2005
• Expiry date: Mar 17, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/685

Abstract

Hot-electron injection driven by hole impact ionization in the channel-to-drain junction of a p-channel MOSFET provides a new mechanism for writing a floating-gate memory. Various pFET floating-gate structures use a combination of this mechanism and electron tunneling to implement nonvolatile analog memory, nonvolatile digital memory, or on-line learning in silicon. The memory is nonvolatile because the devices use electrically isolated floating gates to store electronic charge. The devices enable on-line learning because the electron injection and tunneling mechanisms that write the memory can occur during normal device operation. The memory updates and learning are bidirectional because the injection and tunneling mechanisms add and remove electrons from the floating gate, respectively. Because the memory updates depend on both the stored memory and the pFETs terminal voltages, and because they are bidirectional, the devices can implement on-line learning functions.