Micro-machined semiconductor package
US6965168B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 26, 2002 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | Feb 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hermetic multi-layered ceramic semiconductor package for micro-machined semiconductor devices. The package has a substrate with top and bottom surfaces. A micro-machined semiconductor device is located adjacent to the top surface. Vias extend through the substrate between the surfaces. The micro-machined semiconductor device is electrically connected to the vias. A rigid support is located between the micro-machined semiconductor device and the top surface to support the micro-machined semiconductor device during assembly and to space the micro-machined semiconductor device from the top surface. Solder spheres are mounted to the bottom surface and are connected to the vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.