Method of current matching in integrated circuits
US6965360B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2002 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | May 22, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0693
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of providing balanced currents at locations in devices requiring accurate, matched and repeatable current sources, for example visual displays having arrays of light-emitting sources. In one embodiment, the method provides closely balanced currents flowing through column drivers located at or near end regions of a display area. The method allows for more closely matching currents at adjacent columns in a device such as a visual display, wherein the currents are driven by separate driver circuits, thereby eliminating discontinuity in brightness across the entire display area and providing higher quality visual display devices. Another embodiment provides closely balanced currents flowing through column drivers located at or near end regions of a display area. The method additionally allows for balancing currents at adjacent columns or regions throughout the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.