Programmable architecture and methods for motion estimation
US6965644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2001 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | Feb 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/14
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A programmable motion estimator includes one dual ported memory for storing an image block, the prediction error, and a temporary block used in interpolation, and a pixel-group random access dual ported memory for storing a search window. The two ports of the two memories are selectively applied to an arithmetic logic unit, or ALU, through a multiplexer. One output of the ALU provides an absolute difference, which is furnished to a tree adder. Another output of the ALU provides an average value or a difference value, as selected, which is routed to the inputs of the image memory and the search memory. In motion vector searching, the ALU performs pixel absolute difference arithmetic using the pixel groups from the image memory and from the search memory, and determines a sum of absolute differences in the tree adder. In half pixel interpolation, the ALU performs pixel averaging arithmetic using pixel groups from the search memory, and writes back to the search memory. In quarter pixel interpolation, the ACU performs pixel averaging arithmetic using pixel groups from the image and search memories, and writes back to the search memory. In some quarter pixel interpolations, temporary i…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.