Embedded and efficient low-complexity hierarchical image coder and corresponding methods therefor
US6965700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2003 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | Dec 29, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A coder for use in encoding and decoding a data set representing an image includes a first device which partitions the subband transformation into first and second sets, which adds the first set into a list of insignificant sets (LIS), and which initializes a list of significant pixels (LSP), a second device which tests the first and second sets for significance with respect to a threshold value, which partitions significant members of the first and second sets in accordance with first and second partitioning functions, respectively, and which adds significant pixels to the LSP, a third device which refines the quantization of the pixels in the LSP. In operation, the threshold value is decrement as the second and third devices are operation in seriatim until the coding endpoint has been reached. An optional fourth device entropy codes a significance map cooperatively generated by the second and third devices. Methods for encoding and decoding the subband transformation of a data set and a computer program for converting a general purpose computer into a hierarchical image coder are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.