System and method for slot based ARL table learning and concurrent table search using range address insertion blocking
US6965945B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2002 |
| Grant date | Nov 15, 2005 |
| Priority date | — |
| Expiry date | Jan 11, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99933
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network device including at least one network port, a clock, address resolution (ARL) tables, and address resolution logic. The at least one network port is configured to send and receive a data packet. The clock is for generating a timing signal. The ARL tables are configured to store and maintain data related to port addresses of the network device. The address resolution logic is coupled to the ARL tables and configured to perform a search and an update to data into the ARL tables based on the data packet, to calculate a current range of the search, to determine an intended result of the update, and to block the update when the intended result will move data out of the current range of the search, the search and the update being performed concurrently during alternating slots of the timing signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.