Multilevel electronic circuit and method of making the same
US6967152B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2003 |
| Grant date | Nov 22, 2005 |
| Priority date | — |
| Expiry date | Oct 15, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09036
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of producing a multi-level electronic device that begins with machining into a sheet of dielectric material from a surface to create a set of first indentations at a first level. Conductive material is then deposited into the first indentations to create a set of first conductive features. The first indentations are then substantially filled with dielectric material. The process is continued by machining again into the sheet of dielectric material from a surface and thereby creating a set of second indentations at a second level. Further conductive material is deposited into the second indentations to create a set of second conductive features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.