Compact frequency doubler/multiplier circuitry
US6967508B2 · kind B2 · utility
4Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2004 |
| Grant date | Nov 22, 2005 |
| Priority date | — |
| Expiry date | Mar 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/00006
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The frequency doubling circuit and method provides an output signal with stable frequency and a 50% duty cycle. The frequency of the output signal is two times a frequency of the input signal. The circuit only requires four comparators, eight small capacitors, and some switches and transistors for frequency doubling applications. With the help of feedforward structure, the circuit has an almost-instantaneous response. The performance of the provided frequency doubling circuit and method is independent of the frequency and duty cycle of input signal, power supply voltage, temperature, and process variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.