Pixel processing system for image scanning applications
US6968093B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2001 |
| Grant date | Nov 22, 2005 |
| Priority date | — |
| Expiry date | Jul 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/191
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A linear pixel-array processing systems uses a combination of digital and analog signal processing techniques to calibrate the gain and offset of each pixel in the analog domain. A plurality of fixed gain and offset values are applied in the analog domain to adjust the gain and offset of each pixel at high speeds (on the order of 25–50 MHz). By adjusting the gain and offset in the analog domain, the dynamic range of pixel conversion is improved such that the conversion range is fully utilized (over 90%, on the order of 95%–99%). The gain and offset values are determined with an algorithmic calibration routine that corrects for non-ideal effects in the signal path. A single processing channel can be multiplexed to process multiple pixel arrays to provide for a cost effective solution. In higher speed systems, the single processing channel can be extended to multiple processing channels for improved throughput.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.