Super high speed viterbi decoder using circularly connected 2-dimensional analog processing cell array
US6968495B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2002 |
| Grant date | Nov 22, 2005 |
| Priority date | — |
| Expiry date | Oct 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A super high speed Viterbi decoder and decoding method with a circularly connected 2-dimensional analog processing cell array. The Viterbi decoder has a 2-dimensional parallel processing structure, in which analog processing cells are located at nodes of a trellis diagram. An output column of the analog processing cells is connected to a decoding column. Thus, the output column becomes a column right before the decoding column. A reference input signal given at a decoding column is propagated to the whole network, while its magnitude is reduced by an amount of an error metric on each branch. The circuit-based decoding is done by adding trigger signals to disconnect the path corresponding to logic 0 (or 1), and by observing its effect at the output column.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.