Reliable and redundant control signals in a multi-master system
US6970961B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2001 |
| Grant date | Nov 29, 2005 |
| Priority date | — |
| Expiry date | Nov 30, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network device includes redundant buses, redundant master controllers, and slave controllers. Each of the master controllers connects to a corresponding one of the buses. One of the master controllers acts as an active master and the other master controllers act as standby masters. The active master commences a bus cycle that includes an address interval and a data interval, provides a destination address on the corresponding bus during the address interval, and transmits or receives a command or data during the data interval. The slave controllers connect to the bus, detect commencement of the bus cycle, sample the destination address from the bus a predetermined amount of time after commencement of the address interval, and transmit or receive a command or data during the data interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.