Integrated circuit die for wire bonding and flip-chip mounting
US6972494B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2000 |
| Grant date | Dec 6, 2005 |
| Priority date | — |
| Expiry date | Jun 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit die carries conductive pads and thereon, the larger pads being suitable for flip-chip assembly and the smaller pads being suitable for wire bond assembly. The pitch between pads is at least the minimum required for flip-chip assembly, whereas the pitch between each of pads and the adjacent pad or pads is at least the minimum required for wire bond assembly. For wire bond assembly a passivation layer exposing all pads is provided, whereas for flip-chip assembly a passivation layer exposes only certain pads so that conductive bumps may be provided. The provision of pads complying with the minimum spacing requirements for both flip-chip and wire bond assembly enables a “dual purpose” (e.g. one set of pads being for normal production and another set for testing purposes) die to be produced without any increase in die size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.