Semiconductor integrated circuit comprising sense amplifier activating circuit for activating sense amplifier circuit
US6973002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2003 |
| Grant date | Dec 6, 2005 |
| Priority date | — |
| Expiry date | Dec 29, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2281
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit is composed of a memory array, sense amplifiers, a first and second drive circuits, and a sense amplifier control circuit. The memory cell array has memory cells arranged in matrix form. The sense amplifiers amplify a signal read from the memory cells. The sense amplifiers include N channel sense amplifiers each composed of an N channel MOS transistor and P channel sense amplifiers each composed of a P channel MOS transistor. The first and second drive circuits each include an N channel MOS transistor that drives the N channel sense amplifiers or the P channel sense amplifiers, respectively. The first and second drive circuits are arranged adjacent to the sense amplifiers. The sense amplifier control circuit supplies a common control signal to both gate electrodes of the N channel MOS transistors included in the first and second drive circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.