Disaster recovery port in a portable computer
US6973588B2 · kind B2 · utility
3Cited by
9References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2002 |
| Grant date | Dec 6, 2005 |
| Priority date | — |
| Expiry date | Dec 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2200/1632
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An architecture for updating corrupted instructions in a computing device. The computing device includes a housing for enclosing a flash memory for storing a boot loader routine, and at least one boundary-scan device internal to the computing device for processing the boot loader routine, and operatively disposed on a boundary-scan bus. The housing includes a boundary-scan port through which updated instructions are communicated and power provided. The port is concealed under a label, cover, or in a location that limits access by the device owner, such as the battery well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.