Method and apparatus for universal program controlled bus architecture
US6975138B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2004 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Mar 25, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device is described having an internal three-statable bus and a plurality of driving elements coupled to the internal three-statable bus. Each of the driving elements is operable to drive the internal three-statable bus. The programmable logic device also includes a plurality of interface logic circuits with each of the plurality of interface logic circuits coupled to a different one of the plurality of driving elements. Each interface logic circuit is operable to determine whether the internal three-statable bus is being driven and the interface logic circuits are collectively operable to prevent contention of signals on the internal three-statable bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.