Flash memory protection scheme for secured shared BIOS implementation in personal computers with an embedded controller
US6976136B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2001 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Mar 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1425
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method are disclosed for protecting the contents of a shared memory in a memory device controlled by an embedded controller. The apparatus allows dynamic setting of access permissions to said contents and allows updating and recovery of the contents. A computerized system comprising at least one Host linked to the memory device provides access paths to the shared memory, to the Host, and to the embedded controller. An arbitration device for allocating access paths to the memory device is also provided. The memory device is partitioned into separate blocks, each of which is used to store different types of data. A location is designated in the shared memory for storing protection information that includes data related to access operations allowed by at least one access path to a part of the shared memory. Access, via the arbitration device, to separate parts of the shared memory is permitted by using an access control unit that enables/disables access to predetermined portions of the shared memory by at least one of the access paths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.