Turbo decoder architecture with mini-trellis SISO
US6976203B2 · kind B2 · utility
9Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2003 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Dec 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The Turbo decoding architecture has a first soft-input soft-output (SISO) device having a complex trellis structure and a Turbo decoder loop with a second SISO device having a simpler trellis structure. Coded information from a channel is processed by the first SISO device to generate a soft-output based on the coded information. The soft-output is then processed in an iterative loop using the second SISO device. The second SISO device interacts with a decoder device to produce a value representative of the transmitted information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.