Methods and apparatus for implementing parameterizable processors and peripherals
US6976239B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2001 |
| Grant date | Dec 13, 2005 |
| Priority date | — |
| Expiry date | Jan 13, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.