Programmable integrated circuit architecture
US6980029B1 · kind B1 · utility
2Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2002 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Feb 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/177
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device has a plurality of levels of programmable logic modules with fixed interconnections. The outputs of a level connect to inputs of the next level of programmable logic modules. The first level is fed from a bank of memory elements and the inputs to this bank of memory elements are derived from the last level. Crossbar switches are optionally inserted between a carefully chosen pairs of levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.