Dimmer control system with memory
US6980122B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 25, 2005 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Apr 25, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05B39/086
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A dimmer control system has a communication control loop that connects a master unit in series with a plurality of remote units, and it is superimposed in series on the dimmer load line so as to allow two-way communication between the master unit and remote units without affecting the operation of the load. Communications from the master to the remote units are encoded in loop current fluctuations, whereas communications from any remote to the master unit are encoded in loop voltage fluctuations. The master unit has a switched power supply, for use during normal LOAD ON operation, in tandem with a capacitive power supply, for use during LOAD OFF operation of the control units so as to minimize hum. The master unit power supply circuit provides an output rail voltage comprised of a reference voltage for the load superimposed with a control loop voltage for the voltage drop across the series-connected remote units. The master unit has a POWER OFF detection circuit and a non-volatile memory for storing system status information, so that when power is restored, the system can be restored to its former power level. The switch units are formed with a cover frame mounting a switch plate o…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.