Addressing circuit for a cross-point memory array including cross-point resistive elements
US6980465B2 · kind B2 · utility
22Cited by
4References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2003 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Apr 26, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/77
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An addressing circuit is operable to address one or more memory elements in a cross-point memory array. The addressing circuit includes first and second sets of address lines for addressing the cross-point memory array. The address circuit also includes pull-up and pull-down circuit elements. Both the pull-up and pull-down circuit elements and the address lines include cross-point resistive elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.