Semiconductor memory device
US6980475B2 · kind B2 · utility
2Cited by
5References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 21, 2004 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Jun 11, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device has an external terminal receptive of a voltage for switching an operation mode. A protective transistor is connected between the external terminal and a ground. The protective transistor has a drain region and a gate electrode surrounding the drain region. A voltage detection circuit detects a voltage of the external terminal and outputs a switching signal for switching a first operation mode to a second operation mode when a value of the detected voltage is equal to or higher than a preselected voltage value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.