On chip streaming multiple bus protocol with dedicated arbiter
US6981082B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2003 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Jan 31, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention creates dedicated point-to-point or point-to-multipoint links between different devices along plural busses. Synchronized clocks to each device enable proper timing of read and write operations to/from the bus. The bus connection between the devices are selectively switchable so that dedicated bus connections between devices can be switched on and off as needed. Since the links are point-to-point between sending and receiving devices, the throughput of star-like topology (e.g., Ethernet) can be achieved with very low latency. An arbiter creates the link. The link is established indefinitely, for as long as the arbiter configures it to exist. Additional transactions through the link require only a frame signal to be asserted by the sender and the frame signal to be interpreted as a“data ready” signal by the target.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.