Token based cache-coherence protocol
US6981097B2 · kind B2 · utility
17Cited by
3References
36Claims
0Family size
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Inventors
Key dates
| Filing date | Mar 14, 2003 |
| Grant date | Dec 27, 2005 |
| Priority date | — |
| Expiry date | Jan 1, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S707/99952
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache coherence mechanism for a shared memory computer architecture employs tokens to designate a particular node's rights with respect to writing or reading a block of shared memory. The token system provides a correctness substrate to which a number of performance protocols may be freely added.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.