SRAM with temperature-dependent voltage control in sleep mode
US6982915B2 · kind B2 · utility
7Cited by
3References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2003 |
| Grant date | Jan 3, 2006 |
| Priority date | — |
| Expiry date | May 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device (10), comprising a plurality of data storage cells (12), collectively operable in a data access mode and separately in a sleep mode. The sleep mode comprises a period of time during which the plurality of data cells are not accessed and during which a data state stored in each cell in the plurality of data cells is to be maintained at a valid state. The electronic device further comprises circuitry (18′) for providing at least one temperature-dependent voltage to at least one storage device in each cell in the plurality of data storage cells during the sleep mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.