Method for constructing an integrated circuit device having fixed and programmable logic portions and programmable logic architecture for use therewith
US6983442B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2003 |
| Grant date | Jan 3, 2006 |
| Priority date | — |
| Expiry date | Jun 7, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices having fixed and programmable logic portions are made by combining a hardware description language representation of the fixed logic and a hardware description language representation of the programmable logic to create a single hardware description language representation of a device. This allows multiple portions of programmable logic, distributed where needed in whatever size needed, to be interspersed among the fixed logic. Because the behavior of the programmable logic, rather than of the user programming, is being represented, a programmable logic architecture is provided that lacks behaviors, such as combinational loops, that would cause compilation of the hardware description language to generate errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.