Circuit and method for testing a flat panel display
US6985003B2 · kind B2 · utility
8Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2004 |
| Grant date | Jan 10, 2006 |
| Priority date | — |
| Expiry date | Jul 9, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0408
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A testing circuit and a testing method for a flat panel display. The testing circuit is provided to each input terminal of data lines of a data driving circuit, which is integrated into the flat panel display. The testing circuit is for testing performance of a pixel as well as performance of the data driving circuit in the flat panel display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.