CMOS sensor array with a memory interface
US6985181B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2001 |
| Grant date | Jan 10, 2006 |
| Priority date | — |
| Expiry date | Jul 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N2201/0068
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image sensor includes a sensor or a pixel array, a data memory, and a logic circuit, all fabricated on the same integrated chip. The sensor or pixel array outputs digital signals as pixel data representing an image of a scene. The data memory is coupled to the sensor or pixel array for storing the pixel data. The logic circuit is coupled to the data memory and provides a memory interface for exporting the pixel data. The memory interface can be one of a SRAM, a DRAM or a packet protocol synchronous DRAM interface. Including a memory interface in the image sensor allows the image sensor to be coupled directly to the memory interface port of an external image processing unit. The image processing unit can access the image sensor using conventional memory access protocols, thus improving the efficiency and reducing the operational complexity of the image processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.