Method and apparatus for efficient messaging between memories across a PCI bus
US6988160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2001 |
| Grant date | Jan 17, 2006 |
| Priority date | — |
| Expiry date | Aug 14, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The method and apparatus presented are targeted to improve the performance of moving data between memory portions connected by a system bus where writes have higher performance than reads, such as the PCI bus. Due to the PCI bus design, read requests from memories connected across the PCI bus take a significantly longer time to complete than performing a write operation under the same circumstances. The present invention uses the faster write operations across the PCI bus, and queue management techniques, to take advantage of the relative speed of writes in a PCI system. The overall result is significant performance enhancement, which is especially useful in service aware networks (SAN) where operation at wired-speed is of paramount importance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.