System and method for controlling multi-component communications via a bus by causing components to enter and exit a high-impedance state
US6990537B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2003 |
| Grant date | Jan 24, 2006 |
| Priority date | — |
| Expiry date | Feb 4, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4213
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for controlling communication on a bus connecting a first processor, a second processor, and a device. The method transmits a first control signal from the first processor to the second processor via a control signal line, causing a bus connection of the second processor to enter a high-impedance state, transfers data between the device and the first processor via the bus, then setting a bus connection of the first processor to the high-impedance state, and transmits a second control signal from the first processor to the second processor via the control signal line, causing the bus connection of the second processor to exit the high-impedance state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.