System-on-a-chip having an on-chip processor and an on-chip dynamic random access memory (DRAM)
US6993617B2 · kind B2 · utility
14Cited by
7References
2Claims
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Key dates
| Filing date | Mar 21, 2003 |
| Grant date | Jan 31, 2006 |
| Priority date | — |
| Expiry date | Nov 25, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7842
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system-on-a-chip device is provided, the system-on-a-chip device comprising an on-chip processor and an on-chip dynamic random access memory (DRAM) capable of communicating with the on-chip processor. The system-on-a-chip device also comprises at least one on-chip input/output (I/O) bus capable of communicating with the on-chip processor and the on-chip dynamic random access memory (DRAM).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.