Data pre-fetch system and method for a cache memory
US6993630B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2002 |
| Grant date | Jan 31, 2006 |
| Priority date | — |
| Expiry date | Aug 17, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for pre-fetching data signals is disclosed. According to one aspect of the invention, an Instruction Processor (IP) generates requests to access data signals within the cache. Predetermined ones of the requests are provided to pre-fetch control logic, which determines whether the data signals are available within the cache. If not, the data signals are retrieved from another memory within the data processing system, and are stored to the cache. According to one aspect, the rate at which pre-fetch requests are generated may be programmably selected to match the rate at which the associated requests to access the data signals are provided to the cache. In another embodiment, pre-fetch control logic receives information to generate pre-fetch requests using a dedicated interface coupling the pre-fetch control logic to the IP.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.