Method and apparatus for maintaining coherency of shared state between local and remote
US6994259B2 · kind B2 · utility
3Cited by
4References
35Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2002 |
| Grant date | Feb 7, 2006 |
| Priority date | — |
| Expiry date | Jul 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/1095
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A device is presented including a processor having a main memory. The processor includes a state synchronization process. A state memory is attached to the processor. A display, an interface and a transmitting/receiving device are also attached to the processor. The state synchronization process transmits state data to the state memory and to an external device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.