Resonance suppression circuit
US6995605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2004 |
| Grant date | Feb 7, 2006 |
| Priority date | — |
| Expiry date | Mar 31, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resonance suppression circuit is provided to suppress resonance on a power grid of a chip or die. The resonance suppression circuit may include a band-pass filter portion, a comparator portion, an amplification portion and a current dissipation portion. The band-pass filter portion may include an inverter coupled between two signal lines of the power grid. The comparator portion may sense voltage fluctuations at approximately the resonance frequency and trigger the current dissipation portion to turn ON and thereby change the frequency spectrum of the load current on the power grid to suppress the power grid resonance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.