Reducing fill and improving quality of interlaced displays using multi-sampling
US6995772B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 3, 2004 |
| Grant date | Feb 7, 2006 |
| Priority date | — |
| Expiry date | Nov 3, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0224
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a system, method and computer program product for reducing fill and improving quality of interlaced displays using multi-sampling. In an embodiment of the invention, a frame buffer for a interlaced display is filled. Initially, a first multi-sample of the first line of the first field is calculated. The bottom sub-pixels of the first multi-sample are the top sub-pixels of a multi-sample of the first line of the second field. The first multi-sample is written into the frame buffer. Then, a second multi-sample of the second line of the first field is calculated. The top sub-pixels of the second multi-sample are the bottom sub-pixels of a multi-sample of the first line of the second field. Also, the bottom sub-pixels of the second multi-sample are the top sub-pixels of the second line of the second field. The second multi-sample is written into the frame buffer. A multi-sample for each subsequent line of the first field is calculated in this manner and written into the frame buffer. Then, a last multi-sample consisting of the bottom sub-pixels of a full multi-sample of the last line of the second field is calculated. The last multi-sample is also written…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.