Multiple-grant controller with parallel arbitration mechanism and related method
US6996684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2003 |
| Grant date | Feb 7, 2006 |
| Priority date | — |
| Expiry date | Apr 15, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller embeds a volatile memory, a plurality of application circuits and an arbiter. Each of the application circuits is capable of sending a request signal to request access the volatile memory and has a unique priority. When some of the application circuits send requests in a same period, the arbiter selects application circuits with higher priority among those application circuits such that the selected application circuits are allowed to access the volatile memory. The arbiter includes a plurality of arbiter modules and a main arbiter module. Each of the arbiter modules is assigned to a unique set of application circuits in the controller such that the arbiter modules can select higher priority application circuits in the corresponding sets at the same time. The main arbiter module further selects application circuits for accessing the volatile memory according to application circuits selected by the arbiter modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.