Patent · US Expired

Apparatus for alignment of data collected from multiple pipe stages with heterogeneous retention policies in an unprotected pipeline

US6996735B2 · kind B2 · utility

3Cited by
19References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 22, 2002
Grant dateFeb 7, 2006
Priority date
Expiry dateMay 22, 2024

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/321
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus for trace data alignment for trace data generated during differing instruction pipeline stages selectively delays write data, memory access address and memory access control data zero, one or two pipeline stages dependent upon the memory access control data. Program counter data delayed by one clock cycle is delayed one pipeline stage if the next instruction is a new instruction. Program counter control data is also delayed one pipeline stage. The write data, memory access address, memory access control data, program counter data and program counter control data are further delayed a number of pipeline stages to align with read data. The program counter data holds if the pipeline is stalled. The write data, memory access address, memory access control data, program counter data and program counter control data holds in the multistage pipeline delay register if the pipeline is stalled.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.