Automatic current reduction biasing technique for RF amplifier
US6998918B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2004 |
| Grant date | Feb 14, 2006 |
| Priority date | — |
| Expiry date | Aug 24, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/3042
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power amplifier (PA) circuit is disclosed that comprises a PA output stage having a first amplifying portion having a first gain portion and disposed in parallel with a second amplifying portion having a second gain portion, the PA output stage having an output stage gain, an input port for receiving of a RF input signal. A second RF power detector is provided for detecting a signal power of the RF input signal and for providing a second detected signal. An at least a biasing circuit is provided for biasing the first amplifying portion and the second amplifying portion in dependence upon the second detected signal for amplifying the RF input signal such that for the output stage gain the ratio between the first gain portion and the second gain portion varies in dependence upon the second detected signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.