Method of scalable non-blocking shared memory output-buffered switching of variable length data packets from pluralities of ports at full line rate, and apparatus therefor
US6999464B2 · kind B2 · utility
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24Claims
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Key dates
| Filing date | Aug 28, 2001 |
| Grant date | Feb 14, 2006 |
| Priority date | — |
| Expiry date | Apr 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A novel scalable-port non-blocking shared-memory output-buffered variable length queued data switching method and apparatus wherein successive data in each of a plurality of queues of data traffic is distributed to corresponding cells of each of successive memory channels in striped fashion across a shared memory space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.