Modification to reconfigurable functional unit in a reconfigurable chip to perform linear feedback shift register function
US6999984B2 · kind B2 · utility
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5References
21Claims
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Key dates
| Filing date | Nov 21, 2001 |
| Grant date | Feb 14, 2006 |
| Priority date | — |
| Expiry date | Mar 31, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/584
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable chip using reconfigurable functional units is modified to better implement linear feedback shift registers. The reconfigurable functional unit has its input multiplexer unit modified so that it can select a combined value. The combined values include some of the bits from the output of the reconfigurable functional unit as well as carry bit from another reconfigurable functional unit. This can significantly reduce the space required to implement linear feedback shift registers which are useful in many digital communication systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.