Function interface system and method of processing issued functions between co-processors
US7000034B2 · kind B2 · utility
1Cited by
26References
35Claims
0Family size
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Key dates
| Filing date | Mar 2, 2001 |
| Grant date | Feb 14, 2006 |
| Priority date | — |
| Expiry date | Mar 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3018
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A function interface system for use with a fast pattern processor having an internal function bus and an external function bus and a method of operating the same. In one embodiment, the function interface system includes a controller arbitration subsystem configured to process an issued function request received from at least one of the internal function bus and the external function bus and a dispatch subsystem configured to retrieve the issued function request and dispatch the issued function request to at least one associated co-processor via the controller arbitration subsystem.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.