ESD protection circuit
US7002220B1 · kind B1 · utility
9Cited by
19References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2003 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Aug 7, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrostatic discharge (ESD) protection circuit is provided for protecting transistors of an integrated circuit (IC) from ESD. The ESD protection circuit includes n transistors with n gates and less than n drains where n is an integer greater than 1. At least m resistors have first ends that communicate with at least one of the transistors of the IC, a blocking capacitor of the IC, an input pad of the IC, and an output pad of the IC, and second ends that connect to corresponding drain terminals of said drains where m is an integer greater than or equal to n/2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.