Automatic power factor correction using power measurement chip
US7002321B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Feb 27, 2004 |
| Grant date | Feb 21, 2006 |
| Priority date | — |
| Expiry date | Apr 7, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E40/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An automatic power factor correction system, for an electrical power installation drawing varying levels of reactive power, measures an electrical parameter of the power drawn by a load of a power installation using a power measurement integrated circuit, the parameter being capable of indicating a level of reactive power drawn by the load, and couples a combination of capacitors to the power line to compensate for the level of reactive power indicated by the electrical parameter measured. In a first embodiment of the invention, the combination of power factor compensating capacitors is calculated from a signed value of reactive power drawn by the load. In a second embodiment, the compensating capacitor combination is calculated from a value of power factor for the load which is calculated from a ratio of an active power value to an apparent power value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.